prithvi_sinha's projects

Verilog Code
about 1 year ago
Y is 1 when A(MSB),B,C,D(LSB) = 0,1,4,5,10,11,14 else Y is 0.
about 1 year ago
Y is 1 when A (MSB),B,C,D (LSB) = 1,2,4,5,6,7,8,9,11,12,13 else Y is 0
about 1 year ago
Y = 1, if A(MSB), B, C, D(LSB) – are 0,2,8,10,12,13,14,15, and else Y=0
about 1 year ago
(A + B)(C + D)
about 1 year ago
(A+B)C
about 1 year ago
(A+B)C and (A+B)(C+D)
about 1 year ago
AB
about 1 year ago
AB+C
about 1 year ago
Complex Prime Number Detection
about 1 year ago
Simplified Prime Number Detection
about 1 year ago
Multiple Slide Switch
about 1 year ago
Dip Switch And LED
about 1 year ago
Slide Switch and LED
about 1 year ago
Push Button and LED By Prithvi Sinha
about 1 year ago