# Wokwi Logic Gates Nonsense
See the auto-generated verilog here: https://wokwi.com/api/projects/334295537442357843/verilog
ERC Warnings
flipflop1:CLK: Clock driven by combinatorial logic
flipflop1:D: Input pin not driven
gate3:B: Input pin not driven
gate1:B: Input pin not driven
gate4:A: Input pin not driven