/**
 * Project Direct Ghost
 * ====================
 * A small test design for "TinyTapeout".
 *
 * The design contains an 8-bit Linear Feedback Shift Register
 * (LFSR) and full adder.
 *
 * Inputs:
 *  - IN0: Clock
 *  - IN1: Alternate feed enable for LFSR (active high)
 *  - IN2: Alternate feed data for LFSR (for seeding D-flip flops)
 *  - IN3: A_in for Full Adder
 *  - IN4: B_in for Full Adder
 *  - IN5: C_in for Full Adder
 *  - IN6-7: Unused
 *
 * Outputs:
 *  - OUT0: Output of LFSR
 *  - OUT1: Q for Full Adder
 *  - OUT2: C_out for Full Adder
 *  - OUT3-7: Unused
 *
 * LFSR
 * ====
 * The LFSR is a maximal LFSR based on the polynomial:
 *
 *   x^8 + x^6 + x^5 + x^3 + 1
 *
 * It is an illegal state for the D-Flip Flops to be all 0. While
 * the flip flops should initialize to a random state in the real
 * design, this cannot be guaranteed. As a workaround, there is a
 * multiplexer at the input, that will allow you to "seed" the
 * register state.
 *
 * To seed the register state, enable the alternate input by putting
 * IN1 to logic high. Place a value on IN2, and pulse the clock by
 * clicking "Step". Continue to do this until the register is in a
 * state you like.
 *
 * After the register is seeded. disable the alternate input by putting
 * IN1 to logic low. Every time "Step" is clicked, a new value from the
 * LFSR will output on OUT0.
 *
 * https://en.wikipedia.org/wiki/Linear-feedback_shift_register
 *
 * Full Adder
 * ==========
 * The full adder is a classic design, used as a part of an arithmatic
 * logic unit (ALU). There are two bits that come in, and a single bit
 * comes out. The inputs A and B will sum on the output Q.
 *
 * However, in order to be more useful, more bits are required.
 * Therefore, the logic supports a "carry in" and "carry out" bit,
 * designed to be fed into the next part of the adder.
 *
 * For the sake of the design, the inputs and outputs are clocked.
 *
 * Logic Table
 * ------------
 *
 * |  A  |  B  |  C_in  |  Q  |  Q_out  |
 * |-----|-----|--------|-----|---------|
 * |  0  |  0  |   0    |  0  |    0    |
 * |  1  |  0  |   0    |  1  |    0    |
 * |  0  |  1  |   0    |  1  |    0    |
 * |  1  |  1  |   0    |  0  |    1    |
 * |  0  |  0  |   1    |  1  |    0    |
 * |  1  |  0  |   1    |  0  |    1    |
 * |  0  |  1  |   1    |  0  |    1    |
 * |  1  |  1  |   1    |  1  |    1    |
 */
void setup() {
  // put your setup code here, to run once:

}

void loop() {
  // put your main code here, to run repeatedly:

}
10k
Digital InputBreakout
Digital OutputBreakout

ERC Warnings

flipflop10:CLK: Clock driven by combinatorial logic
flipflop11:CLK: Clock driven by combinatorial logic
flipflop12:CLK: Clock driven by combinatorial logic
flipflop13:CLK: Clock driven by combinatorial logic
flipflop1:CLK: Clock driven by combinatorial logic
flipflop2:CLK: Clock driven by combinatorial logic
flipflop3:CLK: Clock driven by combinatorial logic
flipflop4:CLK: Clock driven by combinatorial logic
flipflop5:CLK: Clock driven by combinatorial logic
flipflop6:CLK: Clock driven by combinatorial logic
3 additional warning(s) hidden