void setup() {
  // put your setup code here, to run once:

}

void loop() {
  // put your main code here, to run repeatedly:

}
sw1:1a
sw1:2a
sw1:3a
sw1:4a
sw1:5a
sw1:6a
sw1:7a
sw1:8a
sw1:8b
sw1:7b
sw1:6b
sw1:5b
sw1:4b
sw1:3b
sw1:2b
sw1:1b
10k
clock1:CLK
pwr2:GND
pwr1:VCC
Digital InputBreakout
chip1:EXTIN0
chip1:EXTIN1
chip1:EXTIN2
chip1:EXTIN3
chip1:EXTIN4
chip1:EXTIN5
chip1:EXTIN6
chip1:EXTIN7
chip1:IN7
chip1:IN6
chip1:IN5
chip1:IN4
chip1:IN3
chip1:IN2
chip1:IN1
chip1:IN0
Digital OutputBreakout
chip2:OUT0
chip2:OUT1
chip2:OUT2
chip2:OUT3
chip2:OUT4
chip2:OUT5
chip2:OUT6
chip2:OUT7
chip2:EXTOUT7
chip2:EXTOUT6
chip2:EXTOUT5
chip2:EXTOUT4
chip2:EXTOUT3
chip2:EXTOUT2
chip2:EXTOUT1
chip2:EXTOUT0
sevseg1:COM.1
sevseg1:COM.2
sevseg1:A
sevseg1:B
sevseg1:C
sevseg1:D
sevseg1:E
sevseg1:F
sevseg1:G
sevseg1:DP
sw2:1
sw2:2
sw2:3
btn1:1.l
btn1:2.l
btn1:1.r
btn1:2.r
pwr3:VCC
gate1:A
gate1:B
gate1:OUT
gate2:A
gate2:B
gate2:OUT
gate3:A
gate3:B
gate3:OUT
gate4:A
gate4:B
gate4:OUT
gate5:IN
gate5:OUT
gate6:IN
gate6:OUT
mux1:A
mux1:B
mux1:SEL
mux1:OUT
flipflop1:D
flipflop1:CLK
flipflop1:Q
flipflop1:NOTQ
pwr4:VCC
pwr5:GND
mux2:A
mux2:B
mux2:SEL
mux2:OUT
mux3:A
mux3:B
mux3:SEL
mux3:OUT
mux4:A
mux4:B
mux4:SEL
mux4:OUT
mux5:A
mux5:B
mux5:SEL
mux5:OUT
mux6:A
mux6:B
mux6:SEL
mux6:OUT
mux7:A
mux7:B
mux7:SEL
mux7:OUT
mux8:A
mux8:B
mux8:SEL
mux8:OUT
mux10:A
mux10:B
mux10:SEL
mux10:OUT
mux11:A
mux11:B
mux11:SEL
mux11:OUT
mux12:A
mux12:B
mux12:SEL
mux12:OUT
mux13:A
mux13:B
mux13:SEL
mux13:OUT
mux14:A
mux14:B
mux14:SEL
mux14:OUT
mux15:A
mux15:B
mux15:SEL
mux15:OUT
mux16:A
mux16:B
mux16:SEL
mux16:OUT
mux17:A
mux17:B
mux17:SEL
mux17:OUT
mux18:A
mux18:B
mux18:SEL
mux18:OUT
mux19:A
mux19:B
mux19:SEL
mux19:OUT
mux20:A
mux20:B
mux20:SEL
mux20:OUT
mux21:A
mux21:B
mux21:SEL
mux21:OUT
mux22:A
mux22:B
mux22:SEL
mux22:OUT
mux24:A
mux24:B
mux24:SEL
mux24:OUT
mux25:A
mux25:B
mux25:SEL
mux25:OUT
mux26:A
mux26:B
mux26:SEL
mux26:OUT
mux27:A
mux27:B
mux27:SEL
mux27:OUT
mux28:A
mux28:B
mux28:SEL
mux28:OUT
mux30:A
mux30:B
mux30:SEL
mux30:OUT
mux31:A
mux31:B
mux31:SEL
mux31:OUT
mux33:A
mux33:B
mux33:SEL
mux33:OUT
mux34:A
mux34:B
mux34:SEL
mux34:OUT
mux35:A
mux35:B
mux35:SEL
mux35:OUT
mux36:A
mux36:B
mux36:SEL
mux36:OUT
mux37:A
mux37:B
mux37:SEL
mux37:OUT
mux38:A
mux38:B
mux38:SEL
mux38:OUT
mux39:A
mux39:B
mux39:SEL
mux39:OUT
mux40:A
mux40:B
mux40:SEL
mux40:OUT
mux41:A
mux41:B
mux41:SEL
mux41:OUT
mux42:A
mux42:B
mux42:SEL
mux42:OUT
mux43:A
mux43:B
mux43:SEL
mux43:OUT
mux44:A
mux44:B
mux44:SEL
mux44:OUT
mux45:A
mux45:B
mux45:SEL
mux45:OUT
mux46:A
mux46:B
mux46:SEL
mux46:OUT
mux47:A
mux47:B
mux47:SEL
mux47:OUT
mux48:A
mux48:B
mux48:SEL
mux48:OUT
mux49:A
mux49:B
mux49:SEL
mux49:OUT
pwr6:VCC
pwr7:VCC
pwr8:VCC
pwr9:GND
pwr10:VCC
pwr11:GND
mux29:A
mux29:B
mux29:SEL
mux29:OUT
mux23:A
mux23:B
mux23:SEL
mux23:OUT
mux9:A
mux9:B
mux9:SEL
mux9:OUT
pwr12:VCC
pwr13:GND
mux32:A
mux32:B
mux32:SEL
mux32:OUT
gate8:IN
gate8:OUT
flipflop2:D
flipflop2:CLK
flipflop2:Q
flipflop2:NOTQ
flipflop3:D
flipflop3:CLK
flipflop3:Q
flipflop3:NOTQ
flipflop4:D
flipflop4:CLK
flipflop4:Q
flipflop4:NOTQ
flipflop5:D
flipflop5:CLK
flipflop5:Q
flipflop5:NOTQ
flipflop6:D
flipflop6:CLK
flipflop6:Q
flipflop6:NOTQ
flipflop7:D
flipflop7:CLK
flipflop7:Q
flipflop7:NOTQ
flipflop8:D
flipflop8:CLK
flipflop8:Q
flipflop8:NOTQ
flipflop9:D
flipflop9:CLK
flipflop9:Q
flipflop9:NOTQ
flipflop10:D
flipflop10:CLK
flipflop10:Q
flipflop10:NOTQ
flipflop11:D
flipflop11:CLK
flipflop11:Q
flipflop11:NOTQ
flipflop12:D
flipflop12:CLK
flipflop12:Q
flipflop12:NOTQ
mux50:A
mux50:B
mux50:SEL
mux50:OUT
flipflop13:D
flipflop13:CLK
flipflop13:Q
flipflop13:NOTQ
flipflop14:D
flipflop14:CLK
flipflop14:Q
flipflop14:NOTQ

ERC Warnings

mux3:B: Input pin not driven
mux4:A: Input pin not driven
mux4:B: Input pin not driven
mux10:B: Input pin not driven
mux11:A: Input pin not driven
mux11:B: Input pin not driven
mux17:B: Input pin not driven
mux18:A: Input pin not driven
mux18:B: Input pin not driven
mux24:B: Input pin not driven
12 additional warning(s) hidden