void setup() {
  // put your setup code here, to run once:
  // REG EXTIN 
  //   0: 
  //   1: REF_CLK
  //   2: 
  //   3: SEL_FB_CLK[0]
  //   4: SEL_FB_CLK[1]
  //   5: SEL_FB_CLK[2
  //   6: FB_CLK_IN

  // REG EXTOUT
  //   0: 
  //   1: PLL_UP
  //   2: PLL_DN
  //   3: PLL_RST

}

void loop() {
  // put your main code here, to run repeatedly:

}
sw1:1a
sw1:2a
sw1:3a
sw1:4a
sw1:5a
sw1:6a
sw1:7a
sw1:8a
sw1:8b
sw1:7b
sw1:6b
sw1:5b
sw1:4b
sw1:3b
sw1:2b
sw1:1b
10k
clock1:CLK
pwr2:GND
pwr1:VCC
Digital InputBreakout
chip1:EXTIN0
chip1:EXTIN1
chip1:EXTIN2
chip1:EXTIN3
chip1:EXTIN4
chip1:EXTIN5
chip1:EXTIN6
chip1:EXTIN7
chip1:IN7
chip1:IN6
chip1:IN5
chip1:IN4
chip1:IN3
chip1:IN2
chip1:IN1
chip1:IN0
Digital OutputBreakout
chip2:OUT0
chip2:OUT1
chip2:OUT2
chip2:OUT3
chip2:OUT4
chip2:OUT5
chip2:OUT6
chip2:OUT7
chip2:EXTOUT7
chip2:EXTOUT6
chip2:EXTOUT5
chip2:EXTOUT4
chip2:EXTOUT3
chip2:EXTOUT2
chip2:EXTOUT1
chip2:EXTOUT0
sevseg1:COM.1
sevseg1:COM.2
sevseg1:A
sevseg1:B
sevseg1:C
sevseg1:D
sevseg1:E
sevseg1:F
sevseg1:G
sevseg1:DP
sw2:1
sw2:2
sw2:3
btn1:1.l
btn1:2.l
btn1:1.r
btn1:2.r
pwr3:VCC
gate1:A
gate1:B
gate1:OUT
gate2:A
gate2:B
gate2:OUT
gate3:A
gate3:B
gate3:OUT
gate5:IN
gate5:OUT
gate6:IN
gate6:OUT
flipflop1:D
flipflop1:CLK
flipflop1:Q
flipflop1:NOTQ
pwr4:VCC
gate7:A
gate7:B
gate7:OUT
flipflop2:D
flipflop2:CLK
flipflop2:Q
flipflop2:NOTQ
pwr6:VCC
gate4:A
gate4:B
gate4:OUT
flipflop3:D
flipflop3:CLK
flipflop3:Q
flipflop3:NOTQ
flipflop4:D
flipflop4:CLK
flipflop4:Q
flipflop4:NOTQ
flipflop5:D
flipflop5:CLK
flipflop5:Q
flipflop5:NOTQ
flipflop6:D
flipflop6:CLK
flipflop6:Q
flipflop6:NOTQ
flipflop7:D
flipflop7:CLK
flipflop7:Q
flipflop7:NOTQ
flipflop8:D
flipflop8:CLK
flipflop8:Q
flipflop8:NOTQ
flipflop9:D
flipflop9:CLK
flipflop9:Q
flipflop9:NOTQ
mux2:A
mux2:B
mux2:SEL
mux2:OUT
mux3:A
mux3:B
mux3:SEL
mux3:OUT
mux4:A
mux4:B
mux4:SEL
mux4:OUT
mux5:A
mux5:B
mux5:SEL
mux5:OUT
mux1:A
mux1:B
mux1:SEL
mux1:OUT
mux6:A
mux6:B
mux6:SEL
mux6:OUT
mux7:A
mux7:B
mux7:SEL
mux7:OUT
gate8:IN
gate8:OUT
gate9:IN
gate9:OUT

ERC Warnings

flipflop1:CLK: Clock driven by combinatorial logic
flipflop3:CLK: Clock driven by combinatorial logic
flipflop2:CLK: Clock driven by combinatorial logic