# Lab 2 (Part 2) - Exercise 7

## Question

1. Find the logic expression for output high when majority of bits are high and output low when majority of bits are low for 3 bit system?

## Solution

* Expression in SOP form is `Y = A'.B.C + A.B'.C + A.B.C' + A.B.C`
* Final Expression after solving K-Map is `Y = A.B + B.C + A.C`, which is implemented here using logic gates.

## Truth Table for expression `Y = A'.B.C + A.B'.C + A.B.C' + A.B.C`

| A | B | C | Y |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |