#define __SFR_OFFSET 0x00
#include "avr/io.h"

.global main

main:

  sbi   DDRB, 5     ; Set Pin 13 as output
  sbi   DDRB, 4     ; Set Pin 12 as output
  sbi   DDRB, 3     ; Set Pin 11 as output
  sbi   DDRB, 2     ; Set Pin 10 as output
  sbi   DDRB, 1     ; Set Pin 9 as output
  sbi   DDRB, 0     ; Set Pin 8 as output
  sbi   DDRD, 7     ; Set Pin 7 as output
  sbi   DDRD, 6     ; Set Pin 6 as output
  sbi   DDRD, 5     ; Set Pin 5 as output
  sbi   DDRD, 4     ; Set Pin 4 as output

  CBI   DDRD, 2

btnLED:             ;Check if btn pressed
  sbic  PIND, 2             
  rjmp  blink13            
  jmp   btnLED

blink13:
  sbi   PORTB, 5     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTB, 5
  

blink12:
  sbi   PORTB, 4     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTB, 4  
  

blink11:
  sbi   PORTB, 3     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTB, 3
  

blink10:
  sbi   PORTB, 2     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTB, 2
  

blink9:
  sbi   PORTB, 1     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTB, 1
  

blink8:
  sbi   PORTB, 0     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTB, 0  
  

blink7:
  sbi   PORTD, 7     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTD, 7
  

blink6:
  sbi   PORTD, 6     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTD, 6 
  

blink5:
  sbi   PORTD, 5     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTD, 5
  

blink4:
  sbi   PORTD, 4     
  ldi   r25, 2      
  ldi   r24, 200    
  call  delay_ms    
  cbi   PORTD, 4
  jmp   blink13

delay_ms:
  ; Delay about (r25:r24)*ms. Clobbers r30, and r31.
  ; One millisecond is about 16000 cycles at 16MHz.
  ; The inner loop takes 4 cycles, so we repeat it 3000 times
  ldi   r31, hi8(4000)
  ldi   r30, lo8(4000)
1:
  sbiw    r30, 1
  brne    1b
  sbiw    r24, 1
  brne    delay_ms
  ret