#include "gpio.h"
#include "system.h"
#include "spi.h"
#include "ili9341.h"
//#include "uart.h"

int main() {
  system_init();
  //uart_enable(9600);
  gpio_enable_port(PortC);
  //gpio_enable_port(PA);
  gpio_pin_mode(PinC13, OUTPUT);
  spi_enable();
  ili9341_enable();
  ili9341_set_pixel(0, 0, 0xFFFF);
  while (1) {
    if (system_ticks() % 1000 < 500)
      gpio_pin_clear(PinC13);
    else
      gpio_pin_set(PinC13);

  }
}


demo.c

diagram.json

#include <stm32f1xx.h>
#include <stdint.h>
#include "system.h"

static volatile uint32_t _system_ticks;

void SysTick_Handler() {
  _system_ticks++;
}

uint32_t system_ticks() {
	__disable_irq();
	uint32_t v = _system_ticks;
	__enable_irq();
	return v;
}

void system_set_hse_72mhz_clock() {
	FLASH->ACR &=~FLASH_ACR_LATENCY_0; // latency 2 wait states
	FLASH->ACR |= FLASH_ACR_LATENCY_1;
	RCC->CR |= RCC_CR_HSEON; // enable hse
	while (!(RCC->CR & RCC_CR_HSERDY));
	RCC->CFGR |= RCC_CFGR_PLLSRC // HSE as PLL input
		| RCC_CFGR_PPRE1_DIV2 // APB1 prescale 2 (<36MHz)
		| RCC_CFGR_PLLMULL9; // clk = 8 * 9 = 72Mhz
	RCC->CR |= RCC_CR_PLLON;
	while (!(RCC->CR & RCC_CR_PLLRDY));
	RCC->CFGR |= RCC_CFGR_SW_PLL; // PLL as system clock source
  SystemCoreClockUpdate();
}

void system_init(void) {
	system_set_hse_72mhz_clock();
  SysTick_Config(SystemCoreClock / 1000);
  __enable_irq();
}


system.c

#ifndef _system_h
#define _system_h
#include <stdint.h>

#ifdef __cplusplus
extern "C" {
#endif
uint32_t system_ticks();
void system_set_hse_72mhz_clock();
void system_init();
#ifdef __cplusplus
}
#endif
#endif


system.h

#include <stm32f1xx.h>
#include <stdbool.h>
#include "gpio.h"

GPIO_TypeDef * _GPIOX[] = {
	GPIOA,
	GPIOB,
	GPIOC,
	GPIOD,
};

GPIO_TypeDef * gpio_gpio(gpio_pin_t pin) {
  return _GPIOX[pin >> 16];
}

void gpio_enable_port(gpio_port_t port) {
	switch (port) {
		case PortA:
			RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;
			break;
		case PortB:
			RCC->APB2ENR |= RCC_APB2ENR_IOPBEN;
			break;
		case PortC:
			RCC->APB2ENR |= RCC_APB2ENR_IOPCEN;
      break;
		case PortD:
			RCC->APB2ENR |= RCC_APB2ENR_IOPDEN;
			break;
  }
}

void gpio_pin_mode(gpio_pin_t pin, gpio_pin_mode_t mode) {
 	uint8_t mod = 0, cnf = 0;
	switch (mode) {
		case INPUT:
			mod = 0;
			cnf = 1;
			break;
		case INPUT_PULLUP:
			mod = 0;
			cnf = 2;
			break;
		case INPUT_PULLDOWN:
			mod = 0;
			cnf = 2; // ?
			break;
		case INPUT_ANALOG:
			mod = 0;
			cnf = 0;
			break;
		case OUTPUT:
			mod = 3; // ,2,3
			cnf = 0;
			break;
		case OUTPUT_OPENDRAIN:
			mod = 1; // ,2,3
			cnf = 1;
			break;
	}
	uint16_t pin_mask = pin & 0xffff;
	uint16_t t = pin_mask;
	uint8_t pin_nr = 0;
	while (t > 0) {
			pin_nr++;
			t >>= 1;
	}
	pin_nr--;
	bool lowpin = pin_nr < 8;
	uint16_t p = (pin & 0xffff0000) >> 16;
	GPIO_TypeDef * gpio = gpio_gpio(pin);
	uint32_t val = ((cnf << 2) | mod) << ((pin_nr - (lowpin ? 0 : 8)) * 4);
	uint32_t mask = 0xF << ((pin_nr - (lowpin ? 0 : 8)) * 4);
	if (lowpin) {
		gpio->CRL &= ~mask;
		gpio->CRL |= val;
	} else {
		gpio->CRH &= ~mask;
		gpio->CRH |= val;
	}
}

void gpio_pin_set(gpio_pin_t pin) {
	GPIO_TypeDef * gpio = gpio_gpio(pin);
  gpio->BSRR |= pin & 0xffff;
}

void gpio_pin_clear(gpio_pin_t pin) {
	GPIO_TypeDef * gpio = gpio_gpio(pin);
  gpio->BRR |= pin & 0xffff;
}

void gpio_pin_write(gpio_pin_t pin, bool value) {
	if (value)
		gpio_pin_set(pin);
	else
		gpio_pin_clear(pin);
}


gpio.c

#ifndef _gpio_h
#define _gpio_h
#include <stdbool.h>

typedef enum {
  INPUT,
  INPUT_PULLUP,
  INPUT_PULLDOWN,
  INPUT_ANALOG,
  OUTPUT,
  OUTPUT_OPENDRAIN
} gpio_pin_mode_t;

typedef enum {
  PortA = 0,
  PortB = 1,
  PortC = 2,
  PortD = 3,
} gpio_port_t;

typedef enum {
  PinA0 = 0x00000001,
  PinA1 = 0x00000002,
  PinA2 = 0x00000004,
  PinA3 = 0x00000008,
  PinA4 = 0x00000010,
  PinA5 = 0x00000020,
  PinA6 = 0x00000040,
  PinA7 = 0x00000080,
  PinA8 = 0x00000100,
  PinA9 = 0x00000200,
  PinA10 = 0x00000400,
  PinA11 = 0x00000800,
  PinA12 = 0x00001000,
  PinA13 = 0x00002000,
  PinA14 = 0x00004000,
  PinA15 = 0x00008000,
  PinB0 = 0x00010001,
  PinB1 = 0x00010002,
  PinB2 = 0x00010004,
  PinB3 = 0x00010008,
  PinB4 = 0x00010010,
  PinB5 = 0x00010020,
  PinB6 = 0x00010040,
  PinB7 = 0x00010080,
  PinB8 = 0x00010100,
  PinB9 = 0x00010200,
  PinB10 = 0x00010400,
  PinB11 = 0x00010800,
  PinB12 = 0x00011000,
  PinB13 = 0x00012000,
  PinB14 = 0x00014000,
  PinB15 = 0x00018000,
  PinC0 = 0x00020001,
  PinC1 = 0x00020002,
  PinC2 = 0x00020004,
  PinC3 = 0x00020008,
  PinC4 = 0x00020010,
  PinC5 = 0x00020020,
  PinC6 = 0x00020040,
  PinC7 = 0x00020080,
  PinC8 = 0x00020100,
  PinC9 = 0x00020200,
  PinC10 = 0x00020400,
  PinC11 = 0x00020800,
  PinC12 = 0x00021000,
  PinC13 = 0x00022000,
  PinC14 = 0x00024000,
  PinC15 = 0x00028000,
  PinD0 = 0x00030001,
  PinD1 = 0x00030002,
  PinD2 = 0x00030004,
  PinD3 = 0x00030008,
  PinD4 = 0x00030010,
  PinD5 = 0x00030020,
  PinD6 = 0x00030040,
  PinD7 = 0x00030080,
  PinD8 = 0x00030100,
  PinD9 = 0x00030200,
  PinD10 = 0x00030400,
  PinD11 = 0x00030800,
  PinD12 = 0x00031000,
  PinD13 = 0x00032000,
  PinD14 = 0x00034000,
  PinD15 = 0x00038000,
} gpio_pin_t;

#ifdef __cplusplus
extern "C" {
#endif
void gpio_enable_port(gpio_port_t port);
void gpio_disable_port(gpio_port_t port);
void gpio_pin_mode(gpio_pin_t pin, gpio_pin_mode_t mode);
void gpio_pin_set(gpio_pin_t pin);
void gpio_pin_clear(gpio_pin_t pin);
void gpio_pin_write(gpio_pin_t pin, bool value);
#ifdef __cplusplus
}
#endif
#endif


gpio.h

#include <stm32f1xx.h>
#include "spi.h"
#include "gpio.h"

#define SCK_PIN PA5 // PB3
#define MISO_PIN PA6 // PB4
#define MOSI_PIN PA7 // PB5
#define NSS_PIN PA4 // PA15

#define SPIGPIO GPIOA
#define SCK 5 // 3
#define MISO 6 // 4
#define MOSI 7 // 5

void spi_enable() {
  RCC->APB2ENR |= RCC_APB2ENR_IOPAEN // port clock
			| RCC_APB2ENR_AFIOEN // alt function clock
			| RCC_APB2ENR_SPI1EN; //	spi clock
	GPIOA->CRL &= 0x000FFFFF;
	GPIOA->CRL |= 0xD4D00000; // pb6 input/float, pb7 & pb5 output/alt-func open-drain
	SPI1->CR1 = SPI_CR1_SSM | SPI_CR1_SSI // software slave select
			| SPI_CR1_MSTR | SPI_CR1_SPE // spi master
			| (5 << SPI_CR1_BR_Pos); // baudrate
	AFIO->MAPR &= ~AFIO_MAPR_SPI1_REMAP;
}

void spi_disable() {
	SPI1->CR1 = 0;
  RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN;
}

uint8_t spi_transfer8(uint8_t data) {
	SPI1->DR = data;
	while (!(SPI1->SR & SPI_SR_RXNE));
	return SPI1->DR;
}

void spi_transfer(uint8_t * data, uint8_t len) {
	uint8_t *p = data;
	SPI1->DR = *p;
	while (--len > 0) {
		uint8_t out = *(p + 1);
		while (!(SPI1->SR & SPI_SR_RXNE));
		uint8_t in = SPI1->DR;
		while (!(SPI1->SR & SPI_SR_TXE));
		SPI1->DR = out;
		*p++ = in;
	}
}


spi.c

#ifndef _spi_h_
#define _spi_h_
#include <stdint.h>
#include <stdbool.h>

#ifdef __cplusplus
extern "C" {
#endif
void spi_enable();
void spi_disable();
uint8_t spi_transfer8(uint8_t data);
void spi_transfer(uint8_t * data, uint8_t len);
#ifdef __cplusplus
}
#endif
#endif


spi.h

#include <stdint.h>
#include <stdbool.h>
#include "gpio.h"
#include "spi.h"

#define BIT(x) (1<<x)

#ifdef __AVR__
#define CSPIN PinB2
#define DCPIN PinB1
#else
#define CSPIN PinA4
#define DCPIN PinA3
#endif

typedef enum {
	NOP = 0x00,
	SOFTWARE_RESET = 0x01,
	READ_INDENTIFICATION = 0x04,
	READ_DISPLAY_STATUS = 0x09,
	READ_DISPLAY_POWER_MODE = 0xa,
	READ_MEMORY_ACCESS_CONTROL = 0x0b,
	READ_DISPLAY_PIXEL_FORMAT = 0xc,
	READ_DISPLAY_IMAGE_FORMAT = 0xc,
	READ_SELF_DIAGNOSTIC = 0xF,
	//
	ENTER_SLEEP_MODE = 0x10,
	SLEEP_OUT = 0x11,
	PARTIAL_DISPLAY_MODE_ON = 0x12,
	NORMAL_DISPLAY_MODE_ON = 0x13,
	//
	DISPLAY_INVERSION_OFF = 0x20,
	DISPLAY_INVERSION_ON = 0x21,
	GAMMA_SET = 0x26,
	DISPLAY_OFF = 0x28,
	DISPLAY_ON = 0x29,
	COLUMN_ADDRESS_SET = 0x2a,
	PAGE_ADDRESS_SET = 0x2b,
	MEMORY_WRITE = 0x2c,
	COLOR_SET = 0x2d,
	MEMORY_READ = 0x2e,
	//
	PARTIAL_AREA = 0x30,
	VERTICAL_SCROLLING_DEFINITION = 0x33,
	TEARING_EFFECT_LINE_OFF = 0x34,
	TEARING_EFFECT_LINE_ON = 0x35 ,
	MEMORY_ACCESS_CONTROL = 0x36,
	VERTICAL_SCROLLING_START_ADDRESS = 0x37,
	IDLE_MODE_OFF = 0x38,
	IDLE_MODE_ON = 0x39,
	PIXEL_FORMAT_SET = 0x3A,
	WRITE_MEMORY_CONTINUE = 0x3C,
	READ_MEMORY_CONTINUE = 0x3D,
	//
	RGB_INTERFACE_SIGNAL_CONTROL = 0xB0,
	FRAME_RATE_CONTROL = 0xB1,
	FRAME_RATE_CONTROL2 = 0xB2,
	FRAME_RATE_CONTROL3 = 0xB3,
	DISPLAY_INVERSION_CONTROL = 0xB4,
	BLANKING_PORCH_CONTROL = 0xB5,
	DISPLAY_FUNCTION_CONTROL = 0xB6,
	ENTRY_MODE_SET = 0xB7,
	BACKLIGHT_CONTROL1 = 0xB8,
	BACKLIGHT_CONTROL2 = 0xB9,
	BACKLIGHT_CONTROL3 = 0xBA,
	BACKLIGHT_CONTROL4 = 0xBB,
	BACKLIGHT_CONTROL5 = 0xBC,
	BACKLIGHT_CONTROL6 = 0xBD,
	BACKLIGHT_CONTROL7 = 0xBE,
	BACKLIGHT_CONTROL8 = 0xBF,
	//
	POWER_CONTROL1 = 0xC0,
	POWER_CONTROL2 = 0xC1,
	VCOM_CONTROL1 = 0xC5,
	VCOM_CONTROL2 = 0xC7,
	//
	READ_ID1 = 0xDA,
	READ_ID2 = 0xDB,
	READ_ID3 = 0xDC,
	//
	POSITIVE_GAMMA_CORRECTION = 0xE0,
	NEGATIVE_GAMMA_CORRECTION = 0xE1,
	INTERFACE_CONTROL = 0xF6,
	// extended
	POWER_CONTROL_A = 0xCB,
	POWER_CONTROL_B = 0xCF,
	DRIVER_TIMING_CONTROL_A = 0xE8,
	DRIVER_TIMING_CONTROL_b = 0xEA,
	POWER_ON_SEQUENCE_CONTROL = 0xED,
	PUMP_RATIO_CONTROL = 0xF7
} ili9341_command_t;

// MEMORY_ACCESS_CONTROL 0x0b
#define MY 7 // row address order 0=top to bottom, 1=bottom to top
#define MX 6 // column addres order 0=left to right, 1=right to left
#define MV 5 // row/column exchange
#define ML 4 // vertical refresh order
#define BGR 3 // rgb/grb order
#define MH 2 // horizontal refresh order
// DISPLAY_FUNCTION_CONTROL 0xB6
#define PT0 0
#define PT1 1
#define PTG0 2
#define PTG1 3
//
#define ISC0 0
#define ISC1 1
#define ISC2 2
#define ISC3 3
#define ISC 0b00001111
#define SM 4
#define SS 5
#define GS 6
#define REV 7
//
#define NL 0b00111111

static void cslow() {
  gpio_pin_clear(CSPIN);
}

static void cshigh() {
  gpio_pin_set(CSPIN);
}

static void dclow() {
  gpio_pin_clear(DCPIN);
}

static void dchigh() {
  gpio_pin_set(DCPIN);
}

static void transmit_command(ili9341_command_t cmd) {
	dclow();
	cslow();
	spi_transfer8(cmd);
	cshigh();
	dchigh();
}

static void transmit_data(uint8_t data) {
	dchigh();
	cslow();
	spi_transfer8(data);
	cshigh();
}

static void transmit_data16(uint16_t data) {
	dchigh();
	cslow();
	spi_transfer8((uint8_t)(data >> 8));
	spi_transfer8(data );
	cshigh();
}

static void command(uint8_t cmd) {
	transmit_command(cmd);
}

static void command1(uint8_t cmd, uint8_t p1) {
	transmit_command(cmd);
	transmit_data(p1);
}

static void command2(uint8_t cmd, uint8_t p1, uint8_t p2) {
	transmit_command(cmd);
	transmit_data(p1);
	transmit_data(p2);
}

static void command3(uint8_t cmd, uint8_t p1, uint8_t p2, uint8_t p3) {
	transmit_command(cmd);
	transmit_data(p1);
	transmit_data(p2);
	transmit_data(p3);
}

static void command4(uint8_t cmd, uint8_t p1, uint8_t p2, uint8_t p3, uint8_t p4) {
	transmit_command(cmd);
	transmit_data(p1);
	transmit_data(p2);
	transmit_data(p3);
	transmit_data(p4);
}

void ili9341_enable() {
  gpio_pin_mode(CSPIN, OUTPUT);
  gpio_pin_mode(DCPIN, OUTPUT);
	command(SOFTWARE_RESET);
	//_delay_ms(50);
	command(DISPLAY_OFF);
	command1(POWER_CONTROL1, 0x23); // 4.60v
	command1(POWER_CONTROL2, 0x10); // ???
	command2(VCOM_CONTROL1, 0x2B, 0x2B); // 3.775V
	command1(VCOM_CONTROL2, 0xC0); // no offset voltage
	command1(MEMORY_ACCESS_CONTROL, BIT(MX) | BIT(BGR));
	command2(VERTICAL_SCROLLING_START_ADDRESS, 0, 0);
	command1(PIXEL_FORMAT_SET, 0x55); // 16bit/px
	command2(FRAME_RATE_CONTROL, 0, 0x1B);
	command3(DISPLAY_FUNCTION_CONTROL, BIT(PTG1), BIT(REV) + 2, 0x27);
	// TODO: set gamma
	command(SLEEP_OUT);
	//_delay_ms(150);
	command(DISPLAY_ON);
	//_delay_ms(200);
}

void ili9341_disable() {
	command(DISPLAY_OFF);
	command(ENTER_SLEEP_MODE);
}

void ili9341_set_pixel(uint16_t x, uint16_t y, uint16_t color) {
	uint8_t xh = x >> 8, xl = x & 0xff;
	uint8_t yh = y >> 8, yl = y & 0xff;
	uint8_t ch = (uint16_t)color >> 8, cl = (uint16_t)(color & 0xff);
	command4(COLUMN_ADDRESS_SET, xh, xl, xh, xl);
	command4(PAGE_ADDRESS_SET, yh, yl, yh, yl);
	command(MEMORY_WRITE);
	transmit_data(ch);
	transmit_data(cl);
}


ili9341.c

#ifndef _ili9341_h
#define _ili9341_h
#include <stdint.h>

#ifdef __cplusplus
extern "C" {
#endif
void ili9341_enable();
void ili9341_disable();
void ili9341_set_pixel(uint16_t x, uint16_t y, uint16_t color);
#ifdef __cplusplus
}
#endif
#endif


ili9341.h

#include <stm32f1xx.h>
//#include <stdint.h>
//#include <stdbool.h>
//#include <string.h>
#include "uart.h"

static uint8_t tx_buffer[UART_TX_BUFFER_SIZE + 1];
static uint8_t tx_head;
static uint8_t tx_tail;

static uint8_t rx_buffer[UART_RX_BUFFER_SIZE + 1];
static uint8_t rx_head;
static uint8_t rx_tail;

void _uart_enable(uint32_t baudrate, bool enable_tx, bool enable_rx) {
	RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
	RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; // port A
	// pins a2 and a3 for usart2
	GPIOA->CRL &= (GPIO_CRL_MODE2 | GPIO_CRL_CNF2 | GPIO_CRL_MODE3 | GPIO_CRL_CNF3);
	GPIOA->CRL |= ((0x1 << GPIO_CRL_MODE2_Pos) | (0x2 << GPIO_CRL_CNF2_Pos) |
		(0x0 << GPIO_CRL_MODE3_Pos) | (0x1 << GPIO_CRL_CNF3_Pos));
	// baudrate
	uint16_t uartdiv = SystemCoreClock / baudrate;
	USART2->BRR = (((uartdiv / 16) << USART_BRR_DIV_Mantissa_Pos) |
			((uartdiv % 16) << USART_BRR_DIV_Fraction_Pos));
	USART2->CR1 |= USART_CR1_UE;
	if (enable_tx)
		USART2->CR1 |= USART_CR1_TE;
	if (enable_rx)
		USART2->CR1 |= USART_CR1_RE | USART_CR1_RXNEIE;
	NVIC_EnableIRQ(USART2_IRQn);
}

void uart_enable(uint32_t baudrate) {
	_uart_enable(baudrate, true, true);
}

void uart_enable_tx_only(uint32_t baudrate) {
	_uart_enable(baudrate, true, false);
}

void uart_enable_rx_only(uint32_t baudrate) {
	_uart_enable(baudrate, false, true);
}

void uart_disable() {
	NVIC_DisableIRQ(USART2_IRQn);
	USART2->CR1 &= 0;
	RCC->APB1ENR &= ~RCC_APB1ENR_USART2EN;
	GPIOA->CRL &= GPIO_CRL_MODE2 | GPIO_CRL_CNF2 | GPIO_CRL_MODE3 | GPIO_CRL_CNF3;
}

bool uart_tx_buffer_is_empty() {
	uint8_t next = (tx_head < UART_TX_BUFFER_SIZE ? tx_head + 1 : 0);
	return tx_tail != next;
}

void uart_write(uint8_t * data, uint8_t len) {
	bool empty = (tx_head == tx_tail);
	for (int i = 0; i < len; i++) {
		tx_buffer[tx_head] = data[i];
		tx_head = (tx_head < UART_TX_BUFFER_SIZE ? tx_head + 1 : 0);
	}
	if (empty) {
		//USART2->DR = tx_buffer[tx_tail];
		USART2->CR1 |= USART_CR1_TXEIE;
	}
}

void uart_print(uint8_t * data) {
	uart_write(data, strlen((char *)data));
}

bool uart_data_is_available() {
	return (rx_head != rx_tail);
}

uint8_t uart_read() {
	if (rx_head == rx_tail)
		return 0;
	uint8_t c = rx_buffer[rx_tail];
	rx_tail = (rx_tail < UART_RX_BUFFER_SIZE ? rx_tail + 1 : 0);
	return c;
}

void USART2_IRQHandler(void) {
	if (USART2->SR & USART_SR_RXNE) {
		uint8_t next = rx_head + 1;
		if (next >= UART_RX_BUFFER_SIZE)
			next = 0;
		uint8_t v = USART2->DR;
		if (next != rx_tail) {
			rx_buffer[rx_head] = v;
			rx_head = next;
		}
	}
	if (USART2->SR & USART_SR_TXE) {
		if (tx_head != tx_tail) {
			USART2->DR = tx_buffer[tx_tail];
			tx_tail = (tx_tail < UART_TX_BUFFER_SIZE ? tx_tail + 1 : 0);
		} else
			USART2->CR1 &= ~USART_CR1_TXEIE;
	}
}


uart.c

#ifndef _uart_h
#define _uart_h

#include <stdint.h>
#include <stdbool.h>

#if !defined(UART_TX_BUFFER_SIZE)
#define UART_TX_BUFFER_SIZE 550
#endif
#if !defined(UART_RX_BUFFER_SIZE)
#define UART_RX_BUFFER_SIZE 550
#endif

#ifdef __cplusplus
extern "C" {
#endif
void uart_enable(uint32_t bitrate);
void uart_enable_tx_only(uint32_t bitrate);
void uart_enable_rx_only(uint32_t bitrate);
void uart_disable();

bool uart_tx_buffer_is_empty();
void uart_write(uint8_t * data, uint8_t len);
void uart_print(uint8_t * str);

bool uart_data_is_available();
uint8_t uart_read();
#ifdef __cplusplus
}
#endif
#endif
