board-stm32-bluepill PC13 LOW
board-st-nucleo-l031k6 PB3
board-st-nucleo-l432kc
board-st-nucleo-c031c6 PA5

README.md

diagram.json

// RM0377
#include "m0.h"
#include <stdint.h>

// rcc register map (page 213)
typedef struct {volatile uint32_t
	CR, //0
	ICSCR, //4
	_r0, //8
	CFGR, //C
	CIER, //10
	CIFT, //14
	CICR, //18
	IOPSTR, //1C
	AHBRSTR, //20
	APB2RSTR, //24
	APB1RSTR, //28
	IOPENR, //2c
	AHBENR, //30
	APB2ENR, //34
	APB1ENR, //38
	IOPSMENR, //3C
	AHBSMENR, //40
	APB2SMENR, //44
	APB1SMENR, //48
	CCIPR, //4C
	CSR; //50
} rcc_t;

typedef enum RCC_IOPENR {
	IOPAEN = 0,
	IOPBEN,
	IOPCEN,
	IOPDEN,
	IOPEEN,
	IOPFEN
} rcc_IOPENR_t;

// gpio register map (page 231)
typedef struct {volatile uint32_t
	MODER, //0
	OTYPER, //4
	OSPEEDR, //8
	PUPDR, //C
	IDR, //10
	ODR, //14
	BSRR, //18
	LCKR, //1C
	AFRL, //20
	AFRH, //24
	BRR; //28
} gpio_t;

typedef enum {
	INPUT = 0,
	OUTPUT,
	ALTERNATE,
	ANALOG
} gpio_moder_t;

typedef enum {
	PUSH_PULL = 0,
	OPEN_DRAIN
} gpio_otyper_t;

typedef enum {
	LOW_SPEED = 0,
	MEDIUM_SPEED,
	HIGH_SPEED,
	VERY_HIGH_SPEED
} gpio_ospeedr_t;

typedef enum {
	NO_PULL = 0,
	PULL_UP,
	PULL_DOWN
} gpio_pupdr_t;




// memory map (page 50)
#define RCC ((rcc_t *) 0x40021000)
#define GPIO(x) ((gpio_t *) (0x50000000 + 0x400 * (x)))






#include "narduino.h"

void port_enable(port_t port) {
	if (port == PortA) RCC->IOPENR |= bit(IOPAEN);
	if (port == PortB) RCC->IOPENR |= bit(IOPBEN);
	if (port == PortC) RCC->IOPENR |= bit(IOPCEN);
	if (port == PortD) RCC->IOPENR |= bit(IOPDEN);
}

void pin_mode(pin_t pin, pin_mode_t mode) {
	gpio_moder_t mod;
	gpio_otyper_t out;
	gpio_pupdr_t pull;
  switch (mode) {
    case Input:
			mod = INPUT; pull = NO_PULL;
      break;
    case InputPullUp:
			mod = INPUT; pull = PULL_UP;
      break;
    case InputPullDown:
			mod = INPUT; pull = PULL_DOWN;
      break;
    case InputAnalog:
			mod = ANALOG; pull = NO_PULL;
      break;
    case Output:
			mod = OUTPUT; out = PUSH_PULL;
      break;
    case OutputOpenDrain:
 			mod = OUTPUT; out = OPEN_DRAIN;
      break;
		case AlternateOutput:
 			mode = ALTERNATE; out = PUSH_PULL;
			break;
		case AlternateOutputOpenDrain:
 			mod = ALTERNATE; out = OPEN_DRAIN;
			break;
	}
	gpio_t * gpio = GPIO(port_nr(pin));
	uint32_t val, mask;
	mask = 0x3 << (2 * pin_nr(pin));
	val = mod << (2 * pin_nr(pin));
	gpio->MODER = (gpio->MODER & ~mask) | val;
	val = pull << (2 * pin_nr(pin));
	mask = 0x3 << (2 * pin_nr(pin));
	gpio->PUPDR = (gpio->PUPDR & ~mask) | val;
	mask = 1 << pin_nr(pin);
	val = out << pin_nr(pin);
	gpio->OTYPER = (gpio->OTYPER & ~mask) | val;
}

void pin_set(pin_t pin) {
	gpio_t * gpio = GPIO(port_nr(pin));
	gpio->BSRR |= pin_mask(pin);
}

void pin_reset(pin_t pin) {
	gpio_t * gpio = GPIO(port_nr(pin));
	gpio->BRR |= pin_mask(pin);
}


stm32l0.h

// RM0490
#include "m0.h"
#include <stdint.h>

// rcc register (page 142)
typedef struct {volatile uint32_t
	CR, //0
	ICSCR, //4
	CFGR, //8
	_r0,
	_r1,
	_r2, //14
	CIER, //18
	CIFR, //1C
	CICR, //20
	IOPRSTR, //24
	AHBRSTR, //28
	APBRSTR1, //2c
	APBRSTR2, //30
	IOPENR, //34
	AHBENR, //38
	APBENR1, //3C
	APBENR2, //40
	IOPSMENR, //44
	AHBSMENR, //48
	APBSMENR1, //4C
	APBSMENR2, //50
	CCIPR, //54
	CSR1, //58
	_r3,
	CSR2; //60
} rcc_t;

typedef enum {
	GPIOAEN = 0,
	GPIOBEN,
	GPIOCEN,
	GPIODEN,
	GPIOFEN = 5,
} rcc_iopenr_t;

// gpio register map (page 160)
typedef struct gpio {volatile uint32_t
	MODER, //0
	OTYPER, //4
	OSPEEDR, //8
	PUPDR, //C
	IDR, //10
	ODR, //14
	BSRR, //18
	LCKR, //1C
	AFRL, //20
	AFRH, //24
	BRR; //28
} gpio_t;

typedef enum {
	INPUT = 0,
	OUTPUT,
	ALTERNATE,
	ANALOG
} gpio_moder_t;

typedef enum {
	PUSH_PULL = 0,
	OPEN_DRAIN
} gpio_otyper_t;

typedef enum {
	LOW_SPEED = 0,
	MEDIUM_SPEED,
	HIGH_SPEED,
	VERY_HIGH_SPEED
} gpio_ospeedr_t;

typedef enum {
	NO_PULL = 0,
	PULL_UP,
	PULL_DOWN
} gpio_pupdr_t;



// memory map (page 50)
#define RCC ((rcc_t *) 0x40021000)
#define GPIO(x) ((gpio_t *) (0x50000000 + 0x400 * (x)))



#include "narduino.h"

void port_enable(port_t port) {
	if (port == PortA) RCC->IOPENR |= bit(GPIOAEN);
	if (port == PortB) RCC->IOPENR |= bit(GPIOBEN);
	if (port == PortC) RCC->IOPENR |= bit(GPIOCEN);
	if (port == PortD) RCC->IOPENR |= bit(GPIODEN);
}

void pin_mode(pin_t pin, pin_mode_t mode) {
	gpio_moder_t mod;
	gpio_otyper_t out;
	gpio_pupdr_t pull;
  switch (mode) {
    case Input:
			mod = INPUT; pull = NO_PULL;
      break;
    case InputPullUp:
			mod = INPUT; pull = PULL_UP;
      break;
    case InputPullDown:
			mod = INPUT; pull = PULL_DOWN;
      break;
    case InputAnalog:
			mod = ANALOG; pull = NO_PULL;
      break;
    case Output:
			mod = OUTPUT; out = PUSH_PULL;
      break;
    case OutputOpenDrain:
 			mod = OUTPUT; out = OPEN_DRAIN;
      break;
		case AlternateOutput:
 			mode = ALTERNATE; out = PUSH_PULL;
			break;
		case AlternateOutputOpenDrain:
 			mod = ALTERNATE; out = OPEN_DRAIN;
			break;
	}
	gpio_t * gpio = GPIO(port_nr(pin));
	uint32_t val, mask;
	mask = 0x3 << (2 * pin_nr(pin));
	val = mod << (2 * pin_nr(pin));
	gpio->MODER = (gpio->MODER & ~mask) | val;
	val = pull << (2 * pin_nr(pin));
	mask = 0x3 << (2 * pin_nr(pin));
	gpio->PUPDR = (gpio->PUPDR & ~mask) | val;
	mask = 1 << pin_nr(pin);
	val = out << pin_nr(pin);
	gpio->OTYPER = (gpio->OTYPER & ~mask) | val;
}

void pin_set(pin_t pin) {
	gpio_t * gpio = GPIO(port_nr(pin));
	gpio->BSRR |= pin_mask(pin);
}

void pin_reset(pin_t pin) {
	gpio_t * gpio = GPIO(port_nr(pin));
	gpio->BRR |= pin_mask(pin);
}


stm32c0.h

// RM0008
#include "m3.h"
#include <stdint.h>

// rcc register map (page 12)
typedef struct {volatile uint32_t
	CR,
	CFGR,
	CIR,
	APB2RSTR,
	APB1RSTR,
	AHBENR,
	APB2ENR, //
	APB1ENR,
	BDCR,
	CSR;
} rcc_t;

// section 7.3.1
typedef enum {
	HSION = 0,
	HSIRDY,
	HSITRIM_0 = 3,
	HSITRIM_1,
	HSITRIM_2,
	HSITRIM_3,
	HSITRIM_4,
	HSICAL_0,
	HSICAL_1,
	HSICAL_2,
	HSICAL_3,
	HSICAL_4,
	HSICAL_5,
	HSICAL_6,
	HSICAL_7,
	HSEON,
	HSERDY,
	HSEBYP,
	CSSON,
	PLLON = 24,
	PLLRDY
} rcc_cr_t;

// section 7.3.2
typedef enum {
	SW_0, SW_1,
	SWS_0, SWS_1,
	HPRE_0, HPRE_1, HPRE_2, HPRE_3,
	PPRE1_0, PPRE1_1, PPRE1_2,
	PPRE2_0, PPRE2_1, PPRE2_2,
	ADCPRE_0, ADCPRE_1,
	PLLSRC,
	PLLXTPRE,
	PLLMUL_0, PLLMUL_1, PLLMUL_2,
	USBPRE,
	MCO_0, MCO_1, MCO_2, PLLRDY,
} CFGR_t;
#define SW_HSI 0
#define SW_HSE 1
#define SW_PLL 2
#define HPRE_DIV1 0
#define HPRE_DIV2 (8 << HPRE_0)
#define HPRE_DIV4 (9 << HPRE_0)
#define HPRE_DIV8 (10 << HPRE_0)
#define HPRE_DIV16 (11 << HPRE_0)
#define HPRE_DIV64 (12 << HPRE_0)
#define HPRE_DIV128 (13 << HPRE_0)
#define HPRE_DIV256 (14 << HPRE_0)
#define HPRE_DIV512 (15 << HPRE_0)
#define PPRE1_DIV1 0
#define PPRE1_DIV2 (4 << PPRE1_0)
#define PPRE1_DIV4 (5 << PPRE1_0)
#define PPRE1_DIV8 (6 << PPRE1_0)
#define PPRE1_DIV16 (7 << PPRE1_0)
#define PPRE2_DIV1 0
#define PPRE2_DIV2 (4 << PPRE1_0)
#define PPRE2_DIV4 (5 << PPRE1_0)
#define PPRE2_DIV8 (6 << PPRE1_0)
#define PPRE2_DIV16 (7 << PPRE1_0)
#define ADCPRE_DIV2 0
#define ADCPRE_DIV4 (1 << ADCPRE_0)
#define ADCPRE_DIV6 (2 << ADCPRE_0)
#define ADCPRE_DIV8 (3 << ADCPRE_0)
#define PLL_MULL2 (0 << PLLMUL_0)
#define PLL_MULL3 (1 << PLLMUL_0)
#define PLL_MULL4 (2 << PLLMUL_0)
#define PLL_MULL5 (3 << PLLMUL_0)
#define PLL_MULL6 (4 << PLLMUL_0)
#define PLL_MULL7 (5 << PLLMUL_0)
#define PLL_MULL8 (6 << PLLMUL_0)
#define PLL_MULL9 (7 << PLLMUL_0)
#define PLL_MULL10 (8 << PLLMUL_0)
#define PLL_MULL11 (9 << PLLMUL_0)
#define PLL_MULL12 (10 << PLLMUL_0)
#define PLL_MULL13 (11 << PLLMUL_0)
#define PLL_MULL14 (12 << PLLMUL_0)
#define PLL_MULL15 (13 << PLLMUL_0)
#define PLL_MULL16 (14 << PLLMUL_0)

typedef enum {
	AFIOEN = 0,
	IOPAEN = 2,
	IOPBEN,
	IOPCEN,
	IOPDEN,
	IOPEEN,
	IOPFEN,
	IOPGEN,
	ADC1EN,
	ADC2EN,
	TIM1EN,
	SPI1EN,
	TIM8EN,
	USART1EN,
	ADC3EN,
	TIM9EN = 19,
	TIM10EN,
	TIM11EN
} APB2ENR_t;

// section 9.5 gpio and afio register map
typedef struct {volatile uint32_t
	CRL,
	CRH,
	IDR,
	ODR,
	BSRR,
	BRR,
	LCKR;
} gpio_t;

typedef enum {
	INPUT,
	OUTPUT_10MHZ,
	OUTPUT_2MHZ,
	OUTPUT_50MHZ,
} gpio_crx_mod_t;

typedef enum {
	INPUT_ANALOG = 0,
	INPUT_FLOAT = 1,
	INPUT_PULL = 2,
	OUTPUT_PUSHPULL = 0,
	OUTPUT_OPENDRAIN = 1,
	ALTERNATE_OUTPUT_PUSHPULL = 2,
	ALTERNATE_OUTPUT_OPENDRAIN = 3,
} gpio_crx_cnf_t;


// flash memory (page 54)
typedef struct {volatile uint32_t
	ACR,
	KEYR,
	OPTKEYR,
	SR,
	CR,
	AR,
	_r0,
	OBR,
	WRPR;
} flash_t;

typedef enum {
	LATENCY_0, LATENCY_1, LATENCY_2,
	HLFCYA,
	PRFTBE,
	PRFTBS
} flash_acr_t;

typedef enum {
	LATENCY_NO_WAIT_STATES = 0 << LATENCY_0,
	LATENCY_1_WAIT_STATE = 2 << LATENCY_0,
	LATENCY_2_WAIT_STATES = 4 << LATENCY_0,
} flash_acr_latency_t;

// memory map (page 50)
#define RCC ((rcc_t *) 0x40021000)
#define GPIO(x) ((gpio_t *) (0x40010800 + 0x400 * (x)))
#define FLASH ((flash_t *) 0x40022000)

#include "narduino.h"

// GPIO
void port_enable(port_t port) {
	if (port == PortA) RCC->APB2ENR |= bit(IOPAEN);
	if (port == PortB) RCC->APB2ENR |= bit(IOPBEN);
	if (port == PortC) RCC->APB2ENR |= bit(IOPCEN);
	if (port == PortD) RCC->APB2ENR |= bit(IOPDEN);
}

void pin_mode(pin_t pin, pin_mode_t mode) {
	gpio_crx_mod_t mod;
	gpio_crx_cnf_t cnf;
  switch (mode) {
    case Input:
			mod = INPUT; cnf = INPUT_FLOAT;
      break;
    case InputPullUp:
			mod = INPUT; cnf = INPUT_PULL;
      break;
    case InputPullDown:
			mod = INPUT; cnf = INPUT_PULL;
      break;
    case InputAnalog:
			mod = INPUT; cnf = INPUT_ANALOG;
      break;
    case Output:
			mod = OUTPUT_10MHZ; cnf = OUTPUT_PUSHPULL;
      break;
    case OutputOpenDrain:
 			mod = OUTPUT_10MHZ; cnf = OUTPUT_OPENDRAIN;
      break;
		case AlternateOutput:
 			mode = OUTPUT_10MHZ; cnf = ALTERNATE_OUTPUT_PUSHPULL;
			break;
		case AlternateOutputOpenDrain:
 			mod = OUTPUT_10MHZ; cnf = ALTERNATE_OUTPUT_OPENDRAIN;
			break;
	}
	uint32_t val, mask;
	gpio_t * gpio = GPIO(port_nr(pin));
	if (pin < 8) {
		val = ((cnf << 2) + mod) << (4 * pin_nr(pin));
		mask = 0xf << (4 * pin_nr(pin));
		gpio->CRL = (gpio->CRL & ~mask) | val;
	} else {
		val = ((cnf << 2) + mod) << (4 * (pin_nr(pin) - 8));
		mask = 0xf << (4 * (pin_nr(pin) - 8));
		gpio->CRH = (gpio->CRH & ~mask) | val;
	}
}

void pin_set(pin_t pin) {
	gpio_t * gpio = GPIO(port_nr(pin));
	gpio->BSRR |= pin_mask(pin);
}

void pin_reset(pin_t pin) {
	gpio_t * gpio = GPIO(port_nr(pin));
	gpio->BRR |= pin_mask(pin);
}

void system_init() {
	//FLASH->ACR &=~FLASH_ACR_LATENCY_0; // latency 2 wait states
	//FLASH->ACR |= FLASH_ACR_LATENCY_1;
	FLASH->ACR |= LATENCY_2_WAIT_STATES;
	RCC->CR |= bit(HSEON); // enable hse
	while (!(RCC->CR & bit(HSERDY)));
	RCC->CFGR |= bit(PLLSRC) // HSE as PLL input
			| PPRE1_DIV2 // APB1 prescale 2 (<36MHz)
			| PLL_MULL9; // clk = 8 * 9 = 72Mhz
	RCC->CR |= bit(PLLON);
	while (!(RCC->CR & bit(PLLRDY)));
	RCC->CFGR |= SW_PLL; // PLL as system clock source
  systick_init(71999);
}

rcc.apb2enr.iopaen = 1;
rcc.cfgr.pllsrc = 

stm32f1.h

#ifndef _narduino_h
#define _narduino_h
#include <stdint.h>
#include <stdbool.h>

#define bit(x) (1UL << x)

typedef enum {
	PortA,
	PortB,
	PortC,
	PortD,
} port_t;

typedef enum {
	PinA0  = 0x0000,
	PinA1  = 0x0001,
	PinA2  = 0x0002,
	PinA3  = 0x0003,
	PinA4  = 0x0004,
	PinA5  = 0x0005,
	PinA6  = 0x0006,
	PinA7  = 0x0007,
	PinA8  = 0x0008,
	PinA9  = 0x0009,
	PinA10 = 0x000A,
	PinA11 = 0x000B,
	PinA12 = 0x000C,
	PinA13 = 0x000D,
	PinA14 = 0x000E,
	PinA15 = 0x000F,
	PinB0  = 0x0100,
	PinB1  = 0x0101,
	PinB2  = 0x0102,
	PinB3  = 0x0103,
	PinB4  = 0x0104,
	PinB5  = 0x0105,
	PinB6  = 0x0106,
	PinB7  = 0x0107,
	PinB8  = 0x0108,
	PinB9  = 0x0109,
	PinB10 = 0x010A,
	PinB11 = 0x010B,
	PinB12 = 0x010C,
	PinB13 = 0x010D,
	PinB14 = 0x010E,
	PinB15 = 0x010F,
	PinC0  = 0x0200,
	PinC1  = 0x0201,
	PinC2  = 0x0202,
	PinC3  = 0x0203,
	PinC4  = 0x0204,
	PinC5  = 0x0205,
	PinC6  = 0x0206,
	PinC7  = 0x0207,
	PinC8  = 0x0208,
	PinC9  = 0x0209,
	PinC10 = 0x020A,
	PinC11 = 0x020B,
	PinC12 = 0x020C,
	PinC13 = 0x020D,
	PinC14 = 0x020E,
	PinC15 = 0x020F,
	PinD0  = 0x0300,
	PinD1  = 0x0301,
	PinD2  = 0x0302,
	PinD3  = 0x0303,
	PinD4  = 0x0304,
	PinD5  = 0x0305,
	PinD6  = 0x0306,
	PinD7  = 0x0307,
	PinD8  = 0x0308,
	PinD9  = 0x0309,
	PinD10 = 0x030A,
	PinD11 = 0x030B,
	PinD12 = 0x030C,
	PinD13 = 0x030D,
	PinD14 = 0x030E,
	PinD15 = 0x030F,
} pin_t;

typedef enum {
	Input = 0,
	InputFloat = 0,
	InputPullUp,
	InputPullDown,
	InputAnalog,
	Output = 4,
	OutputPushPull = 4,
	OutputOpenDrain,
	AlternateOutput,
	AlternateOutputOpenDrain
} pin_mode_t;

#define pin_nr(pin) (pin & 0xFF)
#define port_nr(pin) (pin >> 8)
#define pin_mask(pin) (uint32_t)(1 << pin_nr(pin))

void port_enable(port_t port);
void port_disable(port_t port);
void pin_mode(pin_t pin, pin_mode_t mode);
void pin_set(pin_t pin);
void pin_reset(pin_t pin);
void pin_write(pin_t pin, bool value) {
	if (value)
		pin_set(pin);
	else
		pin_reset(pin);
}

void system_init();
uint32_t systick();
void delay_ms(uint32_t ms);


#endif


narduino.h

#include "narduino.h"
//#include "stm32l0.h"
//#include "stm32c0.h"
#include "stm32f1.h"

int main() {
  system_init();
  port_enable(PortC);
  pin_mode(PinC13, Output);
  //pin_set(PinC13);
  while (1) {
    //if ((systick() % 1000) < 500)
      pin_reset(PinC13);
      delay_ms(1000);
    //else
      pin_set(PinC13);
      delay_ms(1000);
 };
}

/*#include "stm32f1.h"
int main() {
  port_enable(PortC);
  pin_mode(PinC13, Output);
  //pin_reset(PinC13);
  while (1);
}*/

main.c

// PM0223
#include <stdint.h>

// SYSTICK (page 63)
typedef struct {volatile uint32_t
  CTRL, //0
  LOAD, //4
  VAL, //8
  CALIB; //C
} systick_t;

typedef enum {
  SYSTICK_ENABLE = 0,
  TICKINT,
  CLKSOURCE,
  COUNTFLAG = 16
} systick_ctrl_t;

typedef enum {
  EXTERNAL_CLOCK = 0,
  PROCESSOR_CLOCK,
} systick_ctrl_clksource_t;

#define SYSTICK ((systick_t *) 0xE000E010)
#define SYSTICK_VECTOR (0x2001C000+0x3C)
#include "narduino.h"

volatile uint32_t _systick;

void SysTick_Handler() {
  _systick++;
}

void systick_init(uint32_t ticks) {
// *((void (**)(void)) SYSTICK_VECTOR) = systick_handler;
  // (F_CPU / 1000) - 1
  SYSTICK->LOAD = ticks;
  SYSTICK->VAL = 0;
  SYSTICK->CTRL = bit(SYSTICK_ENABLE) | bit(TICKINT) | bit(CLKSOURCE);
}

uint32_t systick() {
  return _systick;
}

m0.h

// PM0056
#include <stdint.h>

// SYSTICK (page 150)
typedef struct {volatile uint32_t
  CTRL, //0
  LOAD, //4
  VAL, //8
  CALIB; //C
} systick_t;

typedef enum {
  SYSTICK_ENABLE = 0,
  TICKINT,
  CLKSOURCE,
  COUNTFLAG = 16
} systick_ctrl_t;

#define SYSTICK ((systick_t *) 0xE000E010)

//========================================
#include "narduino.h"

volatile uint32_t _systick;

void SysTick_Handler() {
  _systick++;
}

void systick_init(uint32_t ticks) {
  SYSTICK->LOAD = ticks;
  SYSTICK->VAL = 0;
  SYSTICK->CTRL = bit(SYSTICK_ENABLE) | bit(TICKINT) | bit(CLKSOURCE);
}

uint32_t systick() {
  return _systick;
}

void delay_ms(uint32_t ms) {
  uint32_t start = systick();
  while (systick() < start + ms);
}
