# Tiny Tapeout 7 Template Project

TinyTapeout is an educational project that makes it easier and cheaper
than ever to get your digital designs manufactured on a real chip.

Wokwi provides an easy way to create digital designs for Tiny Tapeout. 
You create a design out of individual logic gates, and simulate them 
with Wokwi to observe the result.

When your design is ready, you can submit it for manufacturing on a 
physical chip with Tiny Tapeout.

To learn more, follow the tutorial at https://tinytapeout.com/digital_design/

Note: when creating your own project, please replace this text with information
about your projects: what it does and how to use it.
sw1:1a
sw1:2a
sw1:3a
sw1:4a
sw1:5a
sw1:6a
sw1:7a
sw1:8a
sw1:8b
sw1:7b
sw1:6b
sw1:5b
sw1:4b
sw1:3b
sw1:2b
sw1:1b
10
clock1:CLK
pwr2:GND
pwr1:VCC
sevseg1:COM.1
sevseg1:COM.2
sevseg1:A
sevseg1:B
sevseg1:C
sevseg1:D
sevseg1:E
sevseg1:F
sevseg1:G
sevseg1:DP
sw2:1
sw2:2
sw2:3
btn1:1.l
btn1:2.l
btn1:1.r
btn1:2.r
pwr3:VCC
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tt-block-input
btn2:1.l
btn2:2.l
btn2:1.r
btn2:2.r
gnd1:GND
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tt-block-output
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tt-block-bidirectional-io
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tt-block-bidirectional-io
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tt-block-bidirectional-io
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tt-block-bidirectional-io
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tt-block-bidirectional-io
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tt-block-bidirectional-io
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tt-block-bidirectional-io
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tt-block-bidirectional-io
r2:1
r2:2
pwr5:VCC
led1:A
led1:C
gnd2:GND
flop6:D
flop6:CLK
flop6:Q
flop6:NOTQ
led7:A
led7:C
gnd11:GND
flop11:D
flop11:CLK
flop11:Q
flop11:NOTQ
mux8:A
mux8:B
mux8:SEL
mux8:OUT
and1:A
and1:B
and1:OUT
xor7:A
xor7:B
xor7:OUT
flop14:D
flop14:CLK
flop14:Q
flop14:NOTQ
and3:A
and3:B
and3:OUT
and4:A
and4:B
and4:OUT
flop1:D
flop1:CLK
flop1:Q
flop1:NOTQ
led2:A
led2:C
gnd3:GND
flop2:D
flop2:CLK
flop2:Q
flop2:NOTQ
mux2:A
mux2:B
mux2:SEL
mux2:OUT
and2:A
and2:B
and2:OUT
xor1:A
xor1:B
xor1:OUT
and5:A
and5:B
and5:OUT
flop3:D
flop3:CLK
flop3:Q
flop3:NOTQ
led3:A
led3:C
gnd4:GND
flop4:D
flop4:CLK
flop4:Q
flop4:NOTQ
mux3:A
mux3:B
mux3:SEL
mux3:OUT
and6:A
and6:B
and6:OUT
xor2:A
xor2:B
xor2:OUT
and7:A
and7:B
and7:OUT
flop5:D
flop5:CLK
flop5:Q
flop5:NOTQ
led4:A
led4:C
gnd5:GND
flop7:D
flop7:CLK
flop7:Q
flop7:NOTQ
mux4:A
mux4:B
mux4:SEL
mux4:OUT
and8:A
and8:B
and8:OUT
xor3:A
xor3:B
xor3:OUT
and9:A
and9:B
and9:OUT
flop8:D
flop8:CLK
flop8:Q
flop8:NOTQ
led5:A
led5:C
gnd6:GND
flop9:D
flop9:CLK
flop9:Q
flop9:NOTQ
mux5:A
mux5:B
mux5:SEL
mux5:OUT
and10:A
and10:B
and10:OUT
xor4:A
xor4:B
xor4:OUT
and11:A
and11:B
and11:OUT
flop10:D
flop10:CLK
flop10:Q
flop10:NOTQ
led6:A
led6:C
gnd7:GND
flop12:D
flop12:CLK
flop12:Q
flop12:NOTQ
mux6:A
mux6:B
mux6:SEL
mux6:OUT
and12:A
and12:B
and12:OUT
xor5:A
xor5:B
xor5:OUT
not1:IN
not1:OUT
or1:A
or1:B
or1:OUT
flop13:D
flop13:CLK
flop13:Q
flop13:NOTQ
and13:A
and13:B
and13:OUT
not2:IN
not2:OUT
or2:A
or2:B
or2:OUT
or3:A
or3:B
or3:OUT
or4:A
or4:B
or4:OUT
or5:A
or5:B
or5:OUT
or6:A
or6:B
or6:OUT
or7:A
or7:B
or7:OUT
or8:A
or8:B
or8:OUT
and14:A
and14:B
and14:OUT
and15:A
and15:B
and15:OUT
and16:A
and16:B
and16:OUT
and17:A
and17:B
and17:OUT
and18:A
and18:B
and18:OUT
and19:A
and19:B
and19:OUT
not3:IN
not3:OUT
and20:A
and20:B
and20:OUT
and21:A
and21:B
and21:OUT
and22:A
and22:B
and22:OUT
and23:A
and23:B
and23:OUT
and24:A
and24:B
and24:OUT