#define SET0(REG,BIT) REG &= ~(1<<BIT)
#define SET1(REG,BIT) REG |= (1<<BIT)
#define TEST(REG,BIT) (REG&(1<<BIT))

bool test =true;

void setup() 
{
  SET1(DDRD, 4);
  SET1(DDRD, 5);

  SET0(DDRD, 7);
  SET1(PORTD,7);

  SET0(ADMUX, REFS1);
  SET0(ADMUX, REFS0);
  SET0(ADMUX, ADLAR);
  SET0(ADMUX, MUX3);
  SET0(ADMUX, MUX2);
  SET0(ADMUX, MUX1);
  SET0(ADMUX, MUX0);

  SET1(ADCSRA,ADEN);
  SET0(ADCSRA,ADATE);
  SET0(ADCSRA,ADIE);
  SET1(ADCSRA,ADPS2);
  SET1(ADCSRA,ADPS1);
  SET1(ADCSRA,ADPS0);
}

void loop() 
{
  SET1(ADCSRA, ADSC);
    while(TEST(ADCSRA,ADIF) == 0)
    {}
    int vysledok = ADCL;
    vysledok = ADCL + (ADCH<<8); 

    
  if(TEST(PIND,7) == 0 && test == true)
  {
    test = false;
    
    for (int i=0; i <= vysledok; i++)
      { 
        SET1(PORTD,4);
        SET1(PORTD,5);
        delay(2);
        SET0(PORTD,5);
      }
  }
  else if(TEST(PIND,7) != 0 && test != true)
  {
    test = true;
  }

}