diagram.json

#include <stdint.h>

#define RCC_BASE_ADDR         0x40021000UL
#define RCC_APBENR2_OFFSET    0x40UL
#define RCC_APBEN2_ADDR       (RCC_BASE_ADDR + RCC_APBENR2_OFFSET)

#define ADC_BASE_ADDR         0x40012400UL
#define ADC_CR_OFFSET         0x08UL
#define ADC_CR_ADDR           (ADC_BASE_ADDR + ADC_CR_OFFSET)


int main()
{
  uint32_t *pRccApbEnr = (uint32_t *) RCC_APBEN2_ADDR;
  uint32_t *pAdcCr1r = (uint32_t *) ADC_CR_ADDR;

  // Enable clock for ADC.
  *pRccApbEnr |= (1 << 20);

  // Enable ADC
  *pAdcCr1r |= (1 << 0);

  for (;;);

}

main.c

#ifndef INC_STM32C0XX_H_
#define INC_STM32C0XX_H_

/*  AHB and APB base address */

#define  AHB_BASE_ADDR      0x40020000UL
#define  APB_BASE_ADDR      0x40000000UL
#define  IO_PORT_BASE_ADDR  0x50000000UL



/* GPIO base address  */
#define GPIOA_BASE_ADDR (IO_PORT_BASE_ADDR +  0000)
#define GPIOB_BASE_ADDR (IO_PORT_BASE_ADDR +  0400)
#define GPIOC_BASE_ADDR (IO_PORT_BASE_ADDR +  0800)
#define GPIOD_BASE_ADDR (IO_PORT_BASE_ADDR +  0C00)
#define GPIOF_BASE_ADDR (IO_PORT_BASE_ADDR +  1400)




#endif

stm32C0xx.h

#include <stdint.h>
#include <stm32C0xx.h>
#define __vo  volatile


typedef struct 
{
  __vo uint32_t MODER;
  __vo uint32_t OTYPER;
  __vo uint32_t OSPEEDR;
  __vo uint32_t PUPDR;
  __vo uint32_t IDR;
  __vo uint32_t ODR;
  __vo uint32_t BSRR;
  __vo uint32_t LCKR;
  __vo uint32_t AFR[2];
  __vo uint32_t BRR;
}GPIO_RegDef_t;


#define GPIOA       (GPIO_RegDef_t* (GPIOA_BASE_ADDR))
#define GPIOB       (GPIO_RegDef_t* (GPIOB_BASE_ADDR))
#define GPIOC       (GPIO_RegDef_t* (GPIOC_BASE_ADDR))
#define GPIOD       (GPIO_RegDef_t* (GPIOD_BASE_ADDR))
#define GPIOF       (GPIO_RegDef_t* (GPIOF_BASE_ADDR))