/*
74HC165 Shift register input example
(C) 2025, Kshyhoo
const int loadPin = 4; // PL – Parallel load (aktywny LOW)
const int dataPin = 5; // Q7
const int clockPin = 2; // CP
const int latchPin = 4; // PL
165 dla 8
*/
const int clockPin = 2; // CP
const int latchPin = 3; // /PL (aktywny LOW)
const int dataPin = 4; // Q7
byte PISOdata = 4; // input from PiSo
byte PISOlatch = 3; // latch for PiSo, LOW=load
byte PISOclk = 2; // PiSo clock
byte PISOreceivedData;
void setup() {
pinMode(PISOdata, INPUT);
pinMode(PISOlatch, OUTPUT);
pinMode(PISOclk, OUTPUT);
Serial.begin(9600);
}
void loop() {
// load register
digitalWrite(PISOlatch, LOW);
// register at high, to allow reading
digitalWrite(PISOlatch, HIGH);
// here's the extra reading you suggested
Serial.print(digitalRead(PISOdata));
// also changed this from i<8 to i<7 since there was excess 0 at data
for (byte i = 0; i < 7; i++) {
digitalWrite(PISOclk, LOW);
digitalWrite(PISOclk, HIGH);
Serial.print(digitalRead(PISOdata));
}
Serial.println();
}Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
QH
___
QH
CLK
SH/LD
ERC Warnings
flop1:CLK: Clock driven by combinatorial logic
flop2:CLK: Clock driven by combinatorial logic
flop3:CLK: Clock driven by combinatorial logic
flop4:CLK: Clock driven by combinatorial logic
flop5:CLK: Clock driven by combinatorial logic
flop6:CLK: Clock driven by combinatorial logic
flop7:CLK: Clock driven by combinatorial logic
flop8:CLK: Clock driven by combinatorial logic